1. Field of the Invention
The invention relates to a semiconductor memory device and, more particularly, to an interface system for a semiconductor memory device.
2. Description of the Related Art
A bus is typically used when two or more signals are routed in parallel over significant distances. The bus will often contain two wires per signal resulting in transmission of a differential signal. The differential signal improves bus speed. Several developments, however, work to adversely affect bus speed. Among them is increased line delay due to increases in line resistance resulting from reductions in line widths and elongations of line lengths. And line delays increase as the separation between differential lines decreases increasing line-to-line capacitance.
One way to improve bus speed is to encode digital data on multiple signal levels and transmit it on a single line. This and other approaches are described in several patents, including U.S. Pat. No. 6,211,698 to Suh and U.S. Pat. Nos. 6,275,067, 6,300,795, 6,320,417, all to Kirsch and others. In all of these cases, however, the devices described suffer from various disadvantages, including lack of implementation flexibility, reduced timing margins, and state discontinuities that lead to decreased speed and increased data errors.
Accordingly, a need remains for an improved interface system for a semiconductor memory device.